专利名称：Design method for semiconductor
integrated circuit device using path isolation
发明人：Ryota Nishikawa,Gen Fukatsu申请号：US11167610申请日：20050628公开号：US07320117B2公开日：20080115
专利附图：
摘要：A design method for a semiconductor integrated circuit device wherein for apath having a signal arrival time longer than a desired signal arrival time, and amongmultiple paths in the semiconductor integrated circuit device, a path isolation is
performed so that a number of other components to be connected to the output of acomponent belonging to the path decreases. The design method can be integrated intoan automatic design flow using a legacy electronic design automation tool.
申请人：Ryota Nishikawa,Gen Fukatsu
地址：Ibaraki JP,Takatsuki JP
国籍：JP,JP
代理机构：Steptoe & Johnson LLP
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