CMOS integrated circuit having a sacrificial metal

专利名称：CMOS integrated circuit having a sacrificial

metal spacer for producing graded NMOSsource/drain junctions dissimilar from PMOSsource/drain junctions

发明人：H. Jim Fulford, Jr.,Mark I. Gardner,Derick J.

Wristers

申请号：US09/189235申请日：19981110公开号：US06107130A公开日：20000822

摘要：An integrated circuit is formed whereby junction of NMOS transistors areformed dissimilar to junctions of PMOS transistors. The NMOS transistors include an LDDarea, an MDD area and a heavy concentration source/drain area. Conversely, the PMOStransistor include an LDD area and a source/drain area. The NMOS transistor junction isformed dissimilar from the PMOS transistor junction to take into account the less mobilenature of the junction dopants relative to the PMOS dopants. Thus, a lessening of theLDD area and the inclusion of an MDD area provide lower source/drain resistance andhigher ohmic connectivity in the NMOS device. The PMOS junction includes a relativelylarge LDD area so as to draw the highly mobile, heavy concentration boron atoms awayfrom the PMOS channel.

申请人：ADVANCED MICRO DEVICES, INC.

代理人：Kevin L.Conly, Rose & Tayon Daffer

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